Method and System for Utilizing Hard and Preferred Rules for C-Routing of Electronic Designs

ABSTRACT

An improved approach for implementing C-routing is described. Cost-based analysis is performed to balance the different rule requirements, to optimize the assignment of objects and nets during C-routing.

BACKGROUND AND SUMMARY

The invention relates to the design and manufacture of integratedcircuits. An integrated circuit (IC) has a large number of electroniccomponents, such as transistors, logic gates, diodes, and wires, whichare fabricated by forming layers of different materials and of differentgeometric shapes on various regions of a silicon wafer. Many phases ofphysical design may be performed with computer aided design (CAD) toolsor electronic design automation (EDA) systems. To design an integratedcircuit, a designer first creates high level behavior descriptions ofthe IC device using a high-level hardware design language. An EDA systemtypically receives the high level behavior descriptions of the IC deviceand translates this high-level design language into netlists of variouslevels of abstraction using a computer synthesis process. A netlistdescribes interconnections of nodes and components on the chip andincludes information of circuit primitives such as transistors anddiodes, their sizes and interconnections, for example.

An integrated circuit designer may use a set of layout EDA applicationprograms to create a physical integrated circuit design layout from alogical circuit design. The layout EDA application uses geometric shapesof different materials to create the various electrical components on anintegrated circuit and to represent electronic and circuit IC componentsas geometric objects with varying shapes and sizes. After an integratedcircuit designer has created an initial integrated circuit layout, theintegrated circuit designer then verifies and optimizes the integratedcircuit layout using a set of EDA testing and analysis tools.Verification may include, for example, design rule checking to verifycompliance with rules established for various IC parameters.

Typically, geometric information about the placement of the nodes andcomponents onto the chip is determined by a placement process and arouting process. The placement process is a process for placingelectronic components or circuit blocks on the chip and the routingprocess is the process for creating interconnections between the blocksand components according to the specified netlist.

The task of all routers is the same—routers are given some pre-existingpolygons consisting of pins on cells and optionally some pre-routes fromthe placers to create geometries so that all pins assigned to differentnets are connected by wires and vias, that all wires and vias assignedto different nets do not overlap, and that all design rules are obeyed.That is, a router fails when two pins on the same net that should beconnected are open, when two pins on two different nets that shouldremain open are shorted, or when some design rules are violated duringrouting.

One of the early routing algorithms is the Lee algorithm, which is alsocommonly called the maze routing algorithm. The Lee algorithm is knownto find a route if one exists. Nonetheless, the Lee algorithm is alsoknown to be slow and memory intensive. As such, the application of thebase Lee algorithm to electronic designs over a certain size isoftentimes impractical. Moreover, the Lee algorithm approach oftenbreaks down if there is a large number of nets or sets of nets that needto be routed over a design.

One widely adopted solution for the impracticality of the Lee algorithmis the introduction of a two-level global routing, which decides therough route for each net, followed by detailed routing. As globalrouting is performed to determine an approximate route for each wire, itis much faster than pure maze routing under the Lee algorithm. Inaddition to determining the rough route for each net, the objectives ofglobal routing are typically to minimize the routing congestion and thetotal wirelength. After the global routing is complete, each areadefined by each global cell or gcell (which may be referred to herein asa “grid”) is then detailed routed by a detailed router.

Three-level routing may also be employed to route an electronic design.In this approach, “C-routing” (which refers to either corridor-routingor conduit-routing) is performed between the global and detailed routingactions. C-routing is performed to coordinate assignments for routeswhich cross one or more global cell boundaries defined during the globalrouting stage. Thus, C-routing will determine the major part or trunk ofa route which cross multiple global cells, leaving mostly shortconnection within a global cell to be handled by the detail router. Thethree-level routing technique provides a very effective “divide andconquer” approach for routing that allows each of the three levels ofrouters to effectively handle a manageable portion of the hierarchy ofrouting tasks.

The usual medium of communication between the IC design engineers andthe foundry is through a set of design rules. The design rules providedesign parameters and guidelines in an attempt to make sure thatdesigners create IC designs which are manufacturable and will functionfor intended purposes. For example, the IC fabrication facility mayprovide spacing rules that specific the minimum spacing between any twoobjects in an IC design layout.

The design rules may be categorized into two types. The first type iscalled hard rules which are the design rules that must be obeyed in theIC design for fabrication/manufacturability. The second type is calledsoft rules or preferred rules which improve one or more factors such astiming, manufacturability, or yield but are not required to be alwaysmet. While a designer may almost always desire the soft rule to be usedto implement a design, there may be design constraints or layoutrestrictions that require the designer to instead create a design thatcomply with the hard rules.

Therefore, one common problem faced by a router is the situation whenboth the hard rules and the preferred rules need to be considered duringthe design process. In many cases, it is very difficult for a router toeffectively and efficiently understand how to balance the need to complywith hard rules while also attempting to implement a design using softrules. At the global router level, one approach that can be taken toaddress hard and soft rules is described in U.S. patent application Ser.No. 11/838,195, filed on Aug. 13, 2007, which is hereby incorporated byreference in its entirety.

However, this problem cannot be efficiently and effectively managed atthe detail router level. Quite simply, the quantity and complexity ofanalysis and management that needs to be performed to adequatelyconsider both hard and soft rules at the detail router level isunmanageable with conventional design techniques.

Embodiments of the present invention provide an approach for performC-routing which can simultaneously consider and balance both hard andsoft rules when implementing C-routes for a design. By performing theseactions during the C-routing process, this avoids (either in part or inits entirety) the complexity of having to simultaneously consider thesetypes of rules during detail routing. Both hard rules and soft rules canbe concurrently considered during C-routing to perform routing/trackassignments across global cells as well as to route longer segments inthe design.

Further details of aspects, objects, and advantages of the invention aredescribed below in the detailed description, drawings, and claims. Boththe foregoing general description and the following detailed descriptionare exemplary and explanatory, and are not intended to be limiting as tothe scope of the invention.

BRIEF DESCRIPTION OF THE FIGURES

The accompanying drawings are included to provide a furtherunderstanding of various embodiments of the invention and, together withthe Detailed Description, serve to explain the principles of variousembodiments of the invention.

FIG. 1 illustrates an embodiment of a system for implementing someembodiments of the invention.

FIG. 2 shows a high level flow of a process for considering both hardrules and soft rules when performing C-routing, according to someembodiments of the invention.

FIG. 3 shows a more detailed flowchart of a process for assigning netsto tracks during C-routing according to an embodiment of the invention.

FIGS. 4A-C provide an illustrative example for C-routing according to anembodiment of the invention, in which preferred soft spacing is employedto perform track assignments.

FIGS. 5A-C provide an illustrative example for C-routing where a hardrule spacing distance is employed to perform track assignments, but inwhich the hard rule spacing is at a relatively low cost.

FIGS. 6A-D provide an illustrative example for C-routing where a hardrule spacing distance is used to perform track assignments, but in whichobject pushing is employed such that the hard rule spacing is at arelatively low cost.

FIGS. 7A-D provide an illustrative example for C-routing where a hardrule spacing distance is used to perform track assignments at arelatively high cost.

FIGS. 8A-C provide an illustrative example for C-routing where netre-ordering is employed to perform track assignments to reduce costs.

FIG. 9 depicts a computerized system on which a method for timingclosure with concurrent process models can be implemented.

DETAILED DESCRIPTION

In one embodiment, the present invention provides an approach foreffectively considering both hard and soft rules simultaneously duringthe process of performing C-routing. As noted above, the design rulesfor an integrated circuit may be categorized into two types. The firsttype is called hard rules which are the design rules that must be obeyedin the IC design for fabrication or manufacturing purposes. The hardrules are often provided or imposed in an inflexible way by ICfabrication facilities. The second type is called soft rules orpreferred rules which improve one or more factors such as timing,crosstalk, manufacturability, or yield. The soft rules do notnecessarily need to be met in the IC design. The problem is that whileit is often preferable to use the soft rules in a design, circumstancesmay require the hard design rules to be used instead. Embodiments of thepresent invention implement approaches that appropriately balance theuse of hard and soft rules in an electronic design.

FIG. 1 shows a system architecture that may used to implementembodiments of the invention. User at one or more user stations 130employ a routing tool 120 to perform routing functions for an electronicdesign 110. The routing tool 120 may be located on a computing devicehaving one or more processors, where the one or more processors are usedto execute program code corresponding to the routing tool 120. Thecomputing device may also include memory or other readable medium tostore data used by the routing tool 120 and to store results generatedfrom the routing tool 120.

The routing functions for the electronic design 110 include thefunctions of global routing 102, C-routing 104, and detail routing 106.As previously noted, global routing 102 is used to provide a high-levelapproximation of routes for nets within the electronic design 110.C-routing 104 provides assignments for tracks between and across theboundaries of global cells within the design 110, and can also be usedto implement relatively long segments within the design. Detailedrouting 106 performs the detailed placement of shapes within theboundaries of Gcells in the layout, where the shapes correspond to therouting structures.

The electronic design 110 may be stored in a database 132. Database 132may also be used to store the design rules 116, including the hard rules112 and the soft rules 114. The C-routing 106 performed by routing tool120 will access both the hard rules 112 and the soft rules 114 whenperforming the C-routing functions.

FIG. 2 shows a high level flow of a process for considering both hardrules and soft rules when performing C-routing, according to someembodiments of the invention. At 202, the process identifies the set ofhard rules that need to be considered when performing C-routing. Theserules are often located as part of a rule deck provided by an IC foundryor fabrication/manufacturing facility. At 204, the process identifies aset of soft rules that are to be used for the design. The soft rules arethe rules that have been identified as preferable to be used, but whichdo not necessarily need to be implemented if there are other constraintswhich prevent them from being applied. The soft rules may be provided byeither the foundry or the user.

At 206, identification is made of the nets within the design that needto be routed. Based upon prior global routing, it is likely that the setof nets that need to be routed between global cells within the layouthas already been determined. Therefore, this action is identifying theset of nets within a particular area or portion of the layout for whichC-routing is needed. In some embodiment, this refers to the set of netsthat need to be assigned to tracks within a global cell boundary or setof grid locations.

The order of the nets for C-routing may be determined at this point(208). According to some embodiments, an initial order of the nets toC-route may already have been determined during the global routingstage. However, to improve the balance between hard rules and softrules, the net may be re-ordered at this C-routing stage, e.g., asdescribed below with respect to FIGS. 8A-C. According to an alternateembodiment, the global routing stage has not yet provided an ordering ofthe nets. Therefore, this action 208 will provide an initial orderingfor the nets to C-route.

At 210, the track locations will be determined for the nets that arebeing C-routed. The track assignments are made with consideration ofboth hard rules and soft rules, to create the optimal balance betweenthe two sets of rules. According to some embodiments, a cost-basedapproach is taken to perform the track assignments. The routing optionthat complies with the design rules and which provide the lowest costwill be selected to implement the configuration of the track assignment.

FIG. 3 shows a more detailed flowchart of a process for assigning netsto tracks during C-routing according to an embodiment of the invention.At 302, the process identifies a particular net or set of nets that needto undergo C-routing. If the order of nets has already been identified,then this action merely takes the next net in the ordered list of netsthat is awaiting C-routing.

Next, the process will identify the different routing options and thecosts for each routing option (306). Each possible routing option isexamined, particularly with respect to its surroundings, to determine acost factor for that routing option.

A number of different parameters may be considered during the costanalysis process. For example, the cost of possible routingconfigurations for both hard rule compliance (310) and soft rulecompliance (308) will be considered. In general, the cost of optionsthat comply with soft rules will correspond to lower cost values thanoptions that comply with hard rules (unless the hard rules areequivalent to the soft rules). For example, consider if a hard ruleexists that requires a first wiring object in the layout to be spaced atleast 2 nm away from another layout object, and a soft rule exists thatwould preferably space a wiring object at least 4 nm away from anotherobject. Generally, the cost of the hard rule option (i.e., spacing of 2nm) would be considered to have a higher cost value than the cost of thesoft rule option (i.e., spacing of 4 nm). This is because the greaterspacing distance of the soft rule option would tend to cause lesselectrical interference with and between wiring objects. Therefore,given the opportunity to choose between these two routing options, thelower cost spacing option of 4 nm would be chosen over the higher costspacing option of 2 nm. Of course, the tension for designers is thatthere may be insufficient available spacing in the layout to allow thelow cost soft rule option, and therefore, the higher cost option maynecessarily have to be implemented.

Even with multiple options that comply with the same rule, one of theoptions may have a lower cost than the other option, based upon, forexample, environmental factors and other nearby objects. For example,consider two routing configurations that both comply with a hard spacingrule of 2 nm. The first routing configuration may include a signal wirethat is spaced 2 nm away from another signal wire. The second routingconfiguration may include a signal wire that is spaced 2 nm away from apower structure (e.g., a line that is connected to either ground orV_(cc)). Between these two configurations that both comply with the samespacing rule, the first configuration is likely to have a higher costthan the second option. This is because there is a higher likelihood ofinterference between two adjacent signal wires than there is between asignal wire and a power structure.

In some circumstances, configurations at the hard rule may actually bedesignated as having a lower cost than configurations at the soft rule.For example, consider again if a hard rule exists that requires a firstwiring object in the layout to be spaced at least 2 nm away from anotherlayout object, and a soft rule exists that would preferably space awiring object at least 4 nm away from another object. Assume that thereare two possible routing configurations, with the first option incompliance with the soft rule and the second option in compliance withthe hard rule. The first routing configuration may include a signal wirethat is spaced 4 nm away from another signal wire. The second routingconfiguration may include a signal wire that is spaced 2 nm away from apower structure (e.g., a line that is connected to either ground orV_(cc)). Many designers feel that power-related wiring structuresprovide sufficient beneficial shielding effects such that it would bepreferable to locate a signal wire very close to a power structure.Therefore, it is possible under certain circumstances where the secondoption in compliance with the hard rule spacing distance, but in whichthe signal wire is adjacent to a power structure, would be assigned alower cost value than the first option having two signal wires with alarger spacing distance between them.

Routing options may be considered that involve pushing or packing oflayout objects (312). This option would result in the movement ofexisting layout objects to create sufficient space to insert wiringobjects in the layout. Other possible options may consider there-ordering of nets within the layout to identify net orders thatprovide for lower costs options (314). According to some embodiments,each of the factors 308, 310, 312, and 314 are individually consideredto identify the lowest cost option. According to an alternativeembodiment, a combination of the factors may be examined together toidentify the lowest cost routing options.

A cost-based “neighbor” index may be used to weight the differentrouting parameters and options. The neighbor index may include differentvalues that determine the preferability of different combinations ofadjacency and adjacency spacings for layout objects. For example, aneighbor index of “0” may be assigned if there is a preference to locatetwo objects in adjacency with each other. To explain, consider a signalwire that is expected to be particularly sensitive to interference. Thissignal wire could be weighted with this index value to indicate apreference to locate the wire adjacent to a power object, to takeadvantage of the beneficial shielding associated with power structures.A neighbor index value of “1” could be used to indicate a neutral or“don't care” rating for a given configuration or adjacency. A neighborindex value of “2” could be assigned to situations in which there is apreference against a particular combination or adjacency. This indexvalue could be assigned, for example, if there are signal wires that arevery sensitive to adjacencies to certain other types of structures andfor which it is desirable to weight against those adjacencies, e.g.,particularly sensitive or critical signal wires from the same bus. Inoperation, the neighbor index could be used, for example, to determinethe cost associated with different options when re-ordering nets to berouted.

Once the different routing options have been identified and cost valuesassigned to each option, identification is made of the lowest costoption among the possible routing configurations (305). The possibleconfigurations could include variances in the spacing, ordering, andtrack/net locations for the different nets. At this point, the trackassignment parameters are generated for the net being analyzed (304). Adetermination is made whether there are more nets to C-route. If so,then the process returns back to 302 to select another net. If not, thenthe C-route design information is displayed and/or stored.

The approach of FIG. 3 can be performed sequentially on a net-by-netbasis, or it can be performed with the concurrent assignment andconsideration of multiple nets. With the sequential approach, each netis routed according to its own local cost calculations, with subsequentnets routed after each preceding net has been completed. As a result, itis possible that the locally identified lower cost value for a routingconfiguration for a particular net may prove to be more expensiveoverall once additional nets are considered. Therefore, once it is laterdetermined based upon analysis for a subsequent net that a differentconfiguration for an earlier routed net would provide a lower overallcost, it is likely that the earlier configuration would need to bechanged. Examples for this are provided below in conjunction with theobject push examples of FIGS. 6A-D. In the alternative approach, the setof nets to be routed are concurrently considered upfront to identifyoverall costs for the different configurations, and the configurationfor the set of nets providing the lowest cost can be implemented for themultiple nets on a simultaneous basis. Either approach may be employedin conjunction with the invention. For purposes of illustration, thebelow examples are described using the sequential approach.

FIGS. 4A-C provide an illustrative example for C-routing according to anembodiment of the invention, in which preferred soft spacing is employedto perform track assignments. FIG. 4A shows a layout portion thatincludes two power structures P1 and P2, which are, for example, poweror ground wires. A total spacing distance of 20 exists between the edgesof P1 and P2. The C-routing task is to configure the track assignmentsfor two signal wires S1 and S2 between P1 and P2, where both S1 and S2have widths of 4. Assume that the preferred soft spacing rule is adistance of 4 and minimum hard spacing rule is a spacing distance of 2.Also assume that the cost of a spacing distance of 4 is less than thecost of a spacing distance of 2. Further assume that the cost of arouting configuration in which a signal wire is adjacent to a powerstructure is less than the cost of a configuration in which two signalwires are adjacent.

Referring FIG. 4B, the first task is to C-route signal wire S1. Sincethe available spacing distance between P1 and P2 is a total of 20, thereis sufficient room to make a track assignment for S1 in which S1 is atleast the preferred spacing distance (i.e., 4) away from any otherobjects. It is also possible to make a track assignment for S1 in whichS1 is at least the hard spacing rule distance (i.e., 2) away from otherobjects. However, as stated before, the cost of the preferred ruledistance is less than the cost of the hard rule distance. Therefore,wire S1 will be placed adjacent to P1 with a preferred spacing distanceS_(P1-S1) of 4.

Next, signal wire S2 will be routed. As shown in FIG. 4C, there isenough available distance between the edges of S1 and P2 to make a trackassignment for S2 in which S2 is at least the preferred spacing distance(i.e., 4) away from any other objects. It is also possible to make atrack assignment for S2 in which S2 is at least the hard spacing ruledistance (i.e., 2) away from other objects. However, since the cost ofthe preferred rule distance is less than the cost of the hard ruledistance, the preferred spacing rule distance will be chosen. Therefore,wire S2 will be placed adjacent to S1 and P2 with a spacing distanceS_(S1-S2) of 4 between the edge of S1 and S2 and a spacing distanceS_(S2-P2) of 4 between the edge of S2 and P2.

In this example, there was sufficient available space to C-route both S1and S2 with the preferred spacing rule. This was confirmed andimplemented based upon the cost-based analysis showing that the lowestcost option is the option to use the preferred spacing rule distances.

FIGS. 5A-C provide an illustrative example for C-routing where the hardrule spacing distance is employed to perform track assignments, but inwhich the hard rule spacing is at a relatively low cost. FIG. 5A shows alayout portion that includes two power structures P1 and P2, and inwhich a total spacing distance of 18 exists between the edges of P1 andP2. The C-routing task is to configure the track assignments for twosignal wires S1 and S2 between P1 and P2, where both S1 and S2 havewidths of 4. Assume that the preferred soft spacing rule is a distanceof 4 and minimum hard spacing rule is a spacing distance of 2. Alsoassume that the cost of a spacing distance of 4 is less than the cost ofa spacing distance of 2. Further assume that the cost of a routingconfiguration in which a signal wire is adjacent to a power structure isless than the cost of a configuration in which two signal wires areadjacent.

Referring FIG. 5B, the first task is to C-route signal wire S1. Sincethere is an available spacing distance total of 18 between P1 and P2, itis possible to make a track assignment for S1 in which S1 is at leastthe preferred spacing distance (i.e., 4) away from any other objects. Itis also possible to make a track assignment for S1 in which S1 is atleast the hard spacing rule distance (i.e., 2) away from other objects.However, as stated before, the cost of the preferred rule distance isless than the cost of the hard rule distance. Therefore, wire S1 will beplaced adjacent to P1 with a spacing distance S_(P1-S1) of 4.

Next, signal wire S2 will be routed. In this example, there is notenough remaining available distance between the edges of S1 and P2 tomake a track assignment for S2 in which S2 is at the preferred spacingdistance (i.e., 4) away from any other objects. However, as shown inFIG. 5C, it is possible to make the track assignment for S2 where thehard spacing rule distance (i.e., 2) is only applied between S2 and thepower structure P2—the spacing distance between the two signal wires S1and S2 could be configured at the preferred soft rule spacing distanceof 4. The alternative is to make the spacing distance between S1 and S2at 2, and the distance between S2 and P2 at 4. However, this alternativeoption is at a higher cost than the first option, since there is ahigher cost to spacing two signal wires at the hard rule spacingdistance than to have the hard rule spacing distance between a signalwire and a power structure. Therefore, wire S2 will be placed adjacentto S1 and P2 with a spacing distance S_(S1-S2) of 4 between the edge ofS1 and S2 and a spacing distance S_(S2-P2) of 2 between the edge of S2and P2.

FIGS. 6A-D provide an illustrative example for C-routing where the hardrule spacing distance is used to perform track assignments, but in whichobject pushing is employed such that the hard rule spacing is at arelatively low cost. FIG. 6A shows a layout portion that includes twopower structures P1 and P2, and in which a total spacing distance of 16exists between the edges of P1 and P2. The C-routing task is toconfigure the track assignments for two signal wires S1 and S2 betweenP1 and P2, where both S1 and S2 have widths of 4. As before, assume thatthe preferred soft spacing rule is a distance of 4 and minimum hardspacing rule is a spacing distance of 2. Also assume that the cost of aspacing distance of 4 is less than the cost of a spacing distance of 2.Further assume that the cost of a routing configuration in which asignal wire is adjacent to a power structure is less than the cost of aconfiguration in which two signal wires are adjacent.

Referring FIG. 6B, the first task is to C-route signal wire S1. At thispoint, since S2 has not yet been routed, there is still availablespacing between P1 and P2 such that it is possible to make a trackassignment for S1 in which S1 is at least the preferred spacing distance(i.e., 4) away from any other objects. It is also possible to make atrack assignment for S1 in which S1 is at least the hard spacing ruledistance (i.e., 2) away from other objects. However, the cost of thepreferred rule distance is less than the cost of the hard rule distance.Therefore, wire S1 will be placed adjacent to P1 with a spacing distanceS_(P1-S1) of 4.

Next, signal wire S2 will be routed. In this example, there is notenough remaining available distance between the edges of S1 and P2 tomake a track assignment for S2 in which S2 is at the preferred spacingdistance (i.e., 4) away from any other objects. In fact, there is eveninsufficient available space to make the track assignment for S2 wherethe hard spacing rule distance of 2 is only applied between S2 and thepower structure P2, but where the spacing distance between the twosignal wires S1 and S2 is configured at the preferred soft rule spacingdistance of 4. The only available alternative at this point is to makethe spacing distance between S1 and S2 at the hard rule spacing distanceof 2 and the distance between S2 and P2 also at 2.

However, a configuration can be created in which a spacing distance of 4exists between S1 and S2. As shown in FIG. 6C, this configuration can becreated by pushing S1 a distance of 2 towards P1. This creates adistance of 10 between the edges of S1 and P2 available to route S2.

As shown in FIG. 6D, by shifting S1 in this manner, there is nowsufficient space between S1 and P2 to make the track assignment for S2where the hard spacing rule distance of 2 is only applied between S2 andthe power structure P2, and the spacing distance between the two signalwires S1 and S2 configured at the preferred soft rule spacing distanceof 4. Therefore, wire S2 will be placed adjacent to S1 and P2 with aspacing distance S_(S1-S2) of 4 between the edge of S1 and S2 and aspacing distance S_(S2-P2) of 2 between the edge of S2 and P2. Wire S1will now be placed adjacent to P1 with a spacing distance S_(P1-S1) of 2between the edge of S1 and P1. Since the only spacing distances set at 2are between signal wires and power structures, these are stillconsidered to be at low cost configurations, even though configured atthe hard rule spacing distances.

FIGS. 7A-D provide an illustrative example for C-routing where the hardrule spacing distance is used to perform track assignments at arelatively high cost. FIG. 7A shows a layout portion that includes twopower structures P1 and P2, and in which a total spacing distance of 14exists between the edges of P1 and P2. The C-routing task is toconfigure the track assignments for two signal wires S1 and S2 betweenP1 and P2, where both S1 and S2 have widths of 4. As before, assume thatthe preferred soft spacing rule is a distance of 4 and minimum hardspacing rule is a spacing distance of 2. Also assume that the cost of aspacing distance of 4 is less than the cost of a spacing distance of 2.Further assume that the cost of a routing configuration in which asignal wire is adjacent to a power structure is less than the cost of aconfiguration in which two signal wires are adjacent.

Referring FIG. 7B, the first task is to C-route signal wire S1. At thispoint, since S2 has not yet been routed, there is still availablespacing between P1 and P2 such that it is possible to make a trackassignment for S1 in which S1 is at least the preferred spacing distance(i.e., 4) away from any other objects. It is also possible to make atrack assignment for S1 in which S1 is at least the hard spacing ruledistance (i.e., 2) away from other objects. However, the cost of thepreferred rule distance is less than the cost of the hard rule distance.Therefore, wire S1 will be placed adjacent to P1 with a spacing distanceS_(P1-S1) of 4.

Next, signal wire S2 will be routed. In this example, the distancebetween the edges of S1 and P2 provides only a distance of 6, which isnot enough to route S2 even at the hard rule spacing distances. This isbecause the width of S2 (i.e., 4) added to the minimum required spacingbetween S2 and S1 (i.e., 2) and the minimum required spacing between S2and P2 (i.e., 2) adds up to a required minimum spacing of 8.

To create enough available space to place wire S2, S1 is pushed towardsP1, as shown in FIG. 7C. This configuration is created by pushing S1 adistance of 2 towards P1. This creates a distance of 8 between the edgesof S1 and P2 available to route S2. As shown in FIG. 7D, by shifting S1in this manner, there is now sufficient space between S1 and P2 to makethe track assignment for S2 where the hard spacing rule distance of 2 isapplied between S2 and the power structure P2.

However, there is only sufficient space to permit the spacing distancebetween the two signal wires S1 and S2 to be configured at the hard rulespacing distance of 2. Therefore, wire S2 will be placed adjacent to S1and P2 with a spacing distance S_(S1-S2) of 2 between the edge of S1 andS2 and a spacing distance S_(S2-P2) of 2 between the edge of S2 and P2.Wire S1 will now be placed adjacent to P1 with a spacing distanceS_(P1-S1) of 2 between the edge of S1 and P1. Since the spacingdistances of 2 are set between signal wires and power structures, theseare still considered to be at low cost configurations, even thoughconfigured at the hard rule spacing distances. However, the spacingdistance of 2 between signal wires S1 and S2 at the hard rule spacingdistance is considered to be an unavoidable high cost configurationrequirement for this situation.

FIGS. 8A-C provide an illustrative example for C-routing where netre-ordering is employed to perform track assignments to reduce costs.FIG. 8A shows a layout portion that includes two power structures P1 andP2, and in which a total spacing distance of 18 exists between the edgesof P1 and P2. The C-routing task is to configure the track assignmentsfor four signal wires S1, S2, S3, and S4 between P1 and P2, all of thesignal wires S1-S4 have widths of 4.

As before, assume that the preferred soft spacing rule is a distance of4 and minimum hard spacing rule is a spacing distance of 2. Also assumethat the cost of a spacing distance of 4 is less than the cost of aspacing distance of 2. Further assume that the cost of a routingconfiguration in which a signal wire is adjacent to a power structure isless than the cost of a configuration in which two signal wires areadjacent.

In this example, wires S1 and S2 are on a first bus and wires S3 and S4are on a second bus. Wires that are on the same bus and that areadjacent to each other will more likely interfere with each other morethan wires from different busses that are adjacent to each other. Onereason for this is because the wires on different busses are likely tobe on different clocks and will therefore switch at different timedomains. As a result, all else being equal, the cost of two adjacentwires from the same bus will have a higher cost than two adjacent wiresfrom different busses.

Since there is only the available space of 18 between P1 and P2 to routewires S1-S4, there can only be the hard rule spacing distance of 2 forwires S1-S4 between each other and between the other objects P1 and P2.

Assume that the initial order of nets is S1-S2-S3-S4. Referring FIG. 8B,this figure shows each of the wires S1-S2-S3-S4 routed with a spacingdistance of 2. The spacing distance S_(P1-S1) between P1 and S1 is 2,the spacing distance S_(S1-S2) between S1 and S2 is 2, the spacingdistance S_(S2-S3) between S2 and S3 is 2, the spacing distanceS_(S3-S4) , between S3 and S4 is 2, and the spacing distance S_(S4-P2)between S4 and P2 is also 2.

Even though the spacing distances S_(P1-S1) between P1 and S1 andS_(S4-P2) between S4 and P2 are at the hard rule spacing distance of 2,these are low cost spacing distances since the signal wires are adjacentto power structures. The spacing distance S_(S2-S3) between S2 and S3 isalso at a low cost, even though it is at the hard rule spacing distanceof 2, since the two signal wires S2 and S3 are on different busses.

However, the spacing distances S_(S1-S2) between S1 and S2 and S_(S3-S4)between S3 and S4 are at a high cost since they are between signal wireson the same busses and at the hard spacing rule of 2. It would bedesirable to avoid having to incur this cost.

According to some embodiments of the invention, re-ordering can beperformed to reduce the cost of the possible routing options. As shownin FIG. 8C, ordering is applied to perform bus interleaving to createthe order for wires S1-S3-S2-S4, rather than the initial order of thewires S1-S2-S3-S4. By performing bus interleaving, each signal wire canbe routed without having another signal wire adjacent that is from thesame bus. With this re-ordered configuration, the spacing distanceS_(P1-S1) between P1 and S1 remains at 2, the new spacing distanceS_(S1-S3) between S1 and S3 is set at 2, the spacing distance S_(S3-S2)between S3 and S2 remains at 2, the new spacing distance S_(S2-S4)between S2 and S4 is at 2, and the spacing distance S_(S4-P2) between S4and P2 remains at 2.

Even though the spacing distances S_(S1-S3), S_(S3-S2), and S_(S2-S4)between the signal wires are all at the hard rule spacing distance of 2,these are low cost spacing distances since the adjacent signal wires areon different busses. The spacing distances S_(P1-S1) between P1 and S1and S_(S4-P2) between S4 and P2 are also at the hard rule spacingdistance of 2, but these are also low cost spacing distances since thesignal wires are adjacent to power structures.

Therefore, what has been described is an improved approach forimplementing C-routing. According to the disclosed embodiments,cost-based analysis is performed to balance the different rulerequirements, to optimize the assignment of objects and nets duringC-routing.

System Architecture Overview

FIG. 9 is a block diagram of an illustrative computing system 1400suitable for implementing an embodiment of the present invention.Computer system 1400 includes a bus 1406 or other communicationmechanism for communicating information, which interconnects subsystemsand devices, such as processor 1407, system memory 1408 (e.g., RAM),static storage device 1409 (e.g., ROM), disk drive 1410 (e.g., magneticor optical), communication interface 1414 (e.g., modem or Ethernetcard), display 1411 (e.g., CRT or LCD), input device 1412 (e.g.,keyboard), and cursor control.

According to one embodiment of the invention, computer system 1400performs specific operations by processor 1407 executing one or moresequences of one or more instructions contained in system memory 1408.Such instructions may be read into system memory 1408 from anothercomputer readable/usable medium, such as static storage device 1409 ordisk drive 1410. In alternative embodiments, hard-wired circuitry may beused in place of or in combination with software instructions toimplement the invention. Thus, embodiments of the invention are notlimited to any specific combination of hardware circuitry and/orsoftware. In one embodiment, the term “logic” shall mean any combinationof software or hardware that is used to implement all or part of theinvention.

The term “computer readable medium” or “computer usable medium” as usedherein refers to any medium that participates in providing instructionsto processor 1407 for execution. Such a medium may take many forms,including but not limited to, non-volatile media and volatile media.Non-volatile media includes, for example, optical or magnetic disks,such as disk drive 1410. Volatile media includes dynamic memory, such assystem memory 1408.

Common forms of computer readable media includes, for example, floppydisk, flexible disk, hard disk, magnetic tape, any other magneticmedium, CD-ROM, any other optical medium, punch cards, paper tape, anyother physical medium with patterns of holes, RAM, PROM, EPROM,FLASH-EPROM, any other memory chip or cartridge, or any other mediumfrom which a computer can read.

In an embodiment of the invention, execution of the sequences ofinstructions to practice the invention is performed by a single computersystem 1400. According to other embodiments of the invention, two ormore computer systems 1400 coupled by communication link 1415 (e.g.,LAN, PTSN, or wireless network) may perform the sequence of instructionsrequired to practice the invention in coordination with one another.

Computer system 1400 may transmit and receive messages, data, andinstructions, including program, i.e., application code, throughcommunication link 1415 and communication interface 1414. Receivedprogram code may be executed by processor 1407 as it is received, and/orstored in disk drive 1410, or other non-volatile storage for laterexecution.

In the foregoing specification, the invention has been described withreference to specific embodiments thereof. It will, however, be evidentthat various modifications and changes may be made thereto withoutdeparting from the broader spirit and scope of the invention. Forexample, the above-described process flows are described with referenceto a particular ordering of process actions. However, the ordering ofmany of the described process actions may be changed without affectingthe scope or operation of the invention. The specification and drawingsare, accordingly, to be regarded in an illustrative rather thanrestrictive sense.

1. A method for considering both hard design rule and soft design rulesduring C-routing, comprising: identifying a hard design rule forimplementing an electronic design, the hard design rule specifying arequired minimum design threshold for the electronic design; identifyinga soft design rule for implementing the electronic design, the softdesign rule specifying a preferred design threshold for the electronicdesign; identifying a net to be C-routed within the electronic design;determining multiple design configurations for C-routing the net,wherein the multiple design configurations correspond to at least afirst configuration using the hard design rule and at least a secondconfiguration using the soft design rule; determining costs for thefirst and second configurations; and routing the net based upon costanalysis using the costs for the first and second configurations.
 2. Themethod of claim 1 in which the first configuration using the hard designrule is considered to have a higher cost than the second configurationusing the soft design rule.
 3. The method of claim 1 in which anexisting circuit design object is moved to create a lower costconfiguration.
 4. The method of claim 1 in which circuit design objectsare ordered to create a lower cost configuration.
 5. The method of claim4 in which ordering is performed to create bus interleaving.
 6. Themethod of claim 4 in which ordering is performed to position a signalwire object adjacent to a power structure object.
 7. The method of claim1 in which a neighbor index is employed to determine the costs, theneighbor index used to weight the positioning of one design objectrelative to another design object.
 8. The method of claim 1 in whichtrack assignments are generated for the net that is C-routed.
 9. Asystem for implementing C-routing of an electronic design, comprising: acomputer readable storage medium to store some or all of an electronicdesign, the electronic design corresponding to a net to be C-routedwithin the electronic design, the electronic design corresponding to ahard design rule for implementing the electronic design, the hard designrule specifying a required minimum design threshold for the electronicdesign, the electronic design corresponding to a soft design rule forimplementing the electronic design, the soft design rule specifying apreferred design threshold for the electronic design; and a processorthat is configured to execute computer program code, where the computerprogram code determines multiple design configurations for C-routing thenet, where the multiple design configurations correspond to at least afirst configuration using the hard design rule and at least a secondconfiguration using the soft design rule, wherein the computer programcode determines costs for the first and second configurations and routesthe net based upon cost analysis using the costs for the first andsecond configurations.
 10. The system of claim 9 in which the firstconfiguration using the hard design rule is considered to have a highercost than the second configuration using the soft design rule.
 11. Thesystem of claim 9 in which an existing circuit design object is moved tocreate a lower cost configuration.
 12. The system of claim 9 in whichcircuit design objects are ordered to create a lower cost configuration.13. The system of claim 12 in which ordering is performed to create businterleaving.
 14. The system of claim 12 in which ordering is performedto position a signal wire object adjacent to a power structure object.15. The system of claim 9 in which a neighbor index is employed todetermine the costs, the neighbor index used to weight the positioningof one design object relative to another design object.
 16. The systemof claim 9 in which track assignments are generated for the net that isC-routed.
 17. A computer program product that includes a computerreadable medium, the computer readable medium comprising a plurality ofcomputer instructions which, when executed by a processor, cause theprocessor to execute performing a process for considering both harddesign rule and soft design rules during C-routing, the processcomprising: identifying a hard design rule for implementing anelectronic design, the hard design rule specifying a required minimumdesign threshold for the electronic design; identifying a soft designrule for implementing the electronic design, the soft design rulespecifying a preferred design threshold for the electronic design;identifying a net to be C-routed within the electronic design;determining multiple design configurations for C-routing the net,wherein the multiple design configurations correspond to at least afirst configuration using the hard design rule and at least a secondconfiguration using the soft design rule; determining costs for thefirst and second configurations; and routing the net based upon costanalysis using the costs for the first and second configurations. 18.The computer program product of claim 17 in which the firstconfiguration using the hard design rule is considered to have a highercost than the second configuration using the soft design rule.
 19. Thecomputer program product of claim 17 in which an existing circuit designobject is moved to create a lower cost configuration.
 20. The computerprogram product of claim 17 in which circuit design objects are orderedto create a lower cost configuration.
 21. The computer program productof claim 20 in which ordering is performed to create bus interleaving.22. The computer program product of claim 20 in which ordering isperformed to position a signal wire object adjacent to a power structureobject.
 23. The computer program product of claim 17 in which a neighborindex is employed to determine the costs, the neighbor index used toweight the positioning of one design object relative to another designobject.